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Chris039's avatar
Chris039
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
Solved

Setup failed for altera_reserved_tdo

The path below failed the setup timing. The sdc are from the template. How to fix this setup violation? I am using Quartus Pro 22.3
  • SyafieqS's avatar
    SyafieqS
    3 years ago

    Hello Chris,


    In the jtag constraint look for

    proc set_tck_timing_spec { } {

    # USB Blaster 1 uses 6 MHz clock = 166.666 ns period

    set ub1_t_period 166.666

    # USB Blaster 2 uses 24 MHz clock = 41.666 ns period

    set ub2_default_t_period 41.666

    # USB Blaster 2 running at 16 MHz clock safe mode = 62.5 ns period

    set ub2_safe_t_period 62.5


    In snipper above,you may comment 16MHz and 24Mhz, and

    set tck_t_period $ub2_default_t_period


    change the $ub2_default_t_period --> ub1_t_period


SyafieqS's avatar
SyafieqS
Icon for Super Contributor rankSuper Contributor
3 years ago

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


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