Forum Discussion
Occasional ContributorSetup failed for altera_reserved_tdo
Hello Chris,
In the jtag constraint look for
proc set_tck_timing_spec { } {
# USB Blaster 1 uses 6 MHz clock = 166.666 ns period
set ub1_t_period 166.666
# USB Blaster 2 uses 24 MHz clock = 41.666 ns period
set ub2_default_t_period 41.666
# USB Blaster 2 running at 16 MHz clock safe mode = 62.5 ns period
set ub2_safe_t_period 62.5
In snipper above,you may comment 16MHz and 24Mhz, and
set tck_t_period $ub2_default_t_period
change the $ub2_default_t_period --> ub1_t_period
Super ContributorHello Chris,
May I know what frequency you are running for TCK? 24MHz? You need to lower the tck clock rate of UBII. "Lower the tck clock rate of UBII." refers to change in the UBII hw. Then, update .sdc accordingly to confirm with STA. There are a few valid values. 24MHz, the default on UBII, is very hard to meet. 16MHz is more usable without really noticeable performance difference.
The value change is not persistent. Need to reapply upon power cycle of UBII. The lowest UBII supported tck is 6MHz. In this case, you can set to 6Mhz and perhaps the violation is gone.
