Setting up Nallatech pci385 d5 board

I think it'll be more clear if I start with how the software interacts with the hardware in the "usual" case. So assuming you power up the PC with the board already flashed programmed with an OpenCL hardware design (any valid 13.0 design will do). The PC will enumerate the card and see the hardware sitting out there with a PCIe end point present. When you run a OpenCL host application the PCIe card is temporarily taken offline, reconfigured over PCIe, then the enumeration data previously stored in the card is restored. This set of steps is what allows the FPGA to be reconfigured without the computer needing to be rebooted.

So when I suggested the flash programming the reason for that is so that any time you boot the PC you'll have a configured FPGA by the time the PCIe enumeration occurs. The steps you listed out are correct except when you say reboot it really needs to be a power cycle to guarantee that the FPGA becomes configured. Most PCs when rebooted do not power cycle the PCIe boards plugged in. The FPGA only gets configured from flash at power up so by powering down the PC and powering it back up you can ensure the FPGA gets configured from flash. The reason why it's so important to make sure the FPGA is configured from flash is because if that does not happen then you'll be forced to use the Quartus programmer and reboot after any cold boot. This is because if you use the Quartus programmer to configure a blank FPGA then the card has not been enumerated and the OS can't see it which forces you to reboot (chicken & egg kind of problem).