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Altera_Forum's avatar
Altera_Forum
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18 years ago

Setting the I/O bank voltage

I'm hoping some kind soul can help me out here. I'm trying to build the reference design (originally built with Q-II 7.1) that came with my LPRP board. One of the problems is that Quartus II 7....
Altera_Forum's avatar
Altera_Forum
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18 years ago

@anakha: Thanks that could seem like a plausible, albeit odd, theory. To test it I painstakenly assigned all pins in the bank and gave then a 1.8 V I/O standard. Nope, it didn't work. Instead Quartus now complains about all of them.

FYI, the LPRP has an DP3C25F324C8 and the bank in question is bank 6.

I wonder if it could be related to the fact that there are dedicated programming pins in that bank. Still, it doesn't make sense to me.