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Altera_Forum
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18 years ago

Setting the I/O bank voltage

I'm hoping some kind soul can help me out here. I'm trying to build the reference design (originally built with Q-II 7.1) that came with my LPRP board. One of the problems is that Quartus II 7....
Altera_Forum's avatar
Altera_Forum
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18 years ago

Hi Tommy:

My guess is you have one pin in that bank not assigned with an IO standard at all, and it's defaulting to 3.3V or 2.5V (depending on the device).

Make sure all the pins assigned in bank 6 have 1.8V IO set. If you are missing just one, it will flag the bank in error, and depending on the sequence it reads in the pins, may be just flagging this clock pin as the error.

I know I have a design compiled under QII 7.2 that has a clock on a 1.8 IO bank, and it seems to be ok. (Cyclone II/Cyclone III design)

But if you miss one pin, it defaults to either 3.3V or 2.5V.

Pete