Forum Discussion
Altera_Forum
Honored Contributor
9 years agoHi Pavel,
--- Quote Start --- So, the only option to avoid a weak glow of LEDs on my DE1 terrasic card is to set to '0' the corresponding ports programmatically (e.g. in "Initial" section or with "assign") ? --- Quote End --- Initial sections are not always synthesizeable. I did some tests with Synopsys, ISE, and Vivado and got different result. The way I recommend for driving a static value of 1 or 0 from an I/O pin would be to use an assign statement. You could also technically use the following SystemVerilog
logic led_out = 8'h55;
assign led = led_out;
but the synthesis tool will likely warn you that it is using the default value. To avoid that, you can just assign the value you want directly. Depending on the FPGA, there are several options for unused I/O pins, eg., weak pull-up or weak pull-down. Download de1_basic.zip from this thread: http://www.alteraforum.com/forum/showthread.php?t=35687 Take a look at constraints.tcl, and you'll see these two options ...
# Tri-state unused pins
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP "AS INPUT TRI-STATED"
# set_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP "AS INPUT TRI-STATED WITH WEAK PULL-UP"
Cheers, Dave