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Altera_Forum
Honored Contributor
17 years agoFYI: I have also tried using the -reference_pin option as explained in the Altera online example "TimeQuest Example: Basic Source Synchronous Output". This didn't help a bit but apparently this is because the approach suggested earlier to create a clock with create_clock for the output pin and then use it with set_output_delay should have the same effect (or none effect - as in my case...).
Note that the TimeQuest timing reports STILL use the CLK_IN_48 clock as reference. It looks like it ignores the 48 MHz PLL clock, perhaps because the PLL clock has the same frequency and phase as the input 48 clock. I also tried to use the PLL in "source synchronous" mode but no improvement can be measured on my LA. Any ideas how to continue?