Forum Discussion
set_max_skew giving path not found warning
- 5 years ago
Hey,
I have the exact same problem. https://community.intel.com/t5/Intel-Quartus-Prime-Software/Crossing-Clock-Domain-Problems-Timing-Analyser-ignores-set-max/td-p/1308590 .
However it works during the place and route and also the designs output is correct. I can not detect any metastability.Am I right assuming that this error just occurs while using the Timing Analyser and no error is thrown during compilation?
Sadly I also got no answer as do other people with the same question (looking through the forum it gets asked at least once a week I would say).
Best regard
Christian
Hi Jaya,
What I mean is you can use use the Name Finder to search the path and collection for path verification.
If they are CDC (need to double confirm again, roughly judging, both are not related clock obviously), and removing the set group and set skew result no warning, I afraid your design will hit metastability without proper constrain. Maybe you can take a look at below how related to CDC consideration.