Forum Discussion
Altera_Forum
Honored Contributor
16 years agorbugalho (http://www.alteraforum.com/forum/member.php?u=27812),
i have look at the example, and some constraints confuses me. Can you clear my doubt on the question below? constraints: 1. create_generated_clock -name clk_div_2 -source [get_ports {fast_clk}] -divide_by 2 [get_pins {enable_reg|q}] 2. set_multicycle_path 2 -to [get_fanouts [get_pins -hier enable_reg|q*] -through [get_pins -hier *|*ena*]] -setup Question: 1. Why they don use -hier before {enable_reg|q} in 1st constraint and use it in 2nd constraint? 2. In the second constraint,the syntax through is exception? Besides, how to apply constraint for certain module only? thanks