set_clock_groups vs. set_max_delay/set_min_delay

Let's say one clock domain comes in on a clock and drives a global, and has 4ns of clock delay. The other domain is on a PLL and has 0ns of clock delay due to PLL compensation. So there are 4ns of skew. In one direction, that skew could cut into the set_max_delay of 8ns, so the datapath has to be 4ns. That should still be pretty do-able, but it's no longer a slam dunk. Now let's say it cuts the other way, so the set_min_delay of -1ns suddenly looks like a positive 3ns requirement. Now the router has to add at least 3ns of delay to the datapath at the fast corner. At the slow corner this same path may be 6-7ns. Suddenly it's barely meeting timing, and every path has to thread that needle. That's why it gets tricky.