Forum Discussion
Altera_Forum
Honored Contributor
13 years agoGood example, but I don't think it requires a general constraint from 125MHz -> 150Mhz domain. Instead it should be a constraint on that specific gray -> retime_reg transfer. And set_max/min_delay isn't really what you want but set_max_skew.
Set_max/min_delay covers across timing models, which can become very restrictive because of this, yet different timing models would never occur at the same time in hardware, i.e. one path won't be at the fast timing model while another is at the slow. Now, with set_max_skew you still have to put a set_max/min_delay that is really loose(say +/-100) because set_max_skew doesn't overwrite the setup/hold relationships. Personally I would like to see that changed. Also, in this scenario, you can't do a set_clock_groups between the domains because it would also cut set_max_skew analysis. So if there are other paths that can be cut you have to manually find them and false path them. I'm debating if that behavior is incorrect too. That all being said, most designs either cut the path or do a set_max/min_delay constraint(but on the actual paths, not the clock transfers).