Forum Discussion
Altera_Forum
Honored Contributor
16 years agokaz is right in that you're not doing source-synchronous, i.e. you're not sending the clock off chip, but using an external clock to drive the FPGA and DAC. (And right now I'm assuming they're matched delays to each device, as that's the way it's modeled). If you're sending a clock off-chip, then we need to start over...
As for clocking on the falling edge, let's go back to my example. When both the source and destination registers are rising edge-triggered, then the setup requirement is a full clock period, 10ns, and the hold requirement is 0ns. If the external device clocks on the falling edge(which you've modeled by saying the external clock's -waveform has a 180 degree shift), then the default setup requirement is 5ns and hold requirement is -5ns. So you've made the setup requirement tighter and the hold requirement looser. If you're intention was to go to the next window, then add: set_multicycle_path -setup -to [get_clocks PLLOCK_VIRTUAL] 2 This would make the setup requirement 15ns and the hold requirement 5ns. Make sure you go to assignments -> settings -> Fitter and have Optimize Hold Timing checked and Multi-Corner Analysis checked, as you have a positive hold requirement. My comment about registering on the way out is that pretty much all fast I/O interfaces use the dedicated I/O registers. These give the best performance, and they all match nicely across the bus. You're using a memory as your output register, which will have a long delay to each I/O, it won't match nicely, etc. It might work with this setup, I'm just stating the general practice is to register the I/O. Most importanly, you need to be able to do: report_timing -setup -npaths 50 -detail full_path -to_clock PLLLOCK_VIRTUAL -panel_name "s: -> PLLLOCK_VIRTUAL" report_timing -hold -npaths 50 -detail full_path -to_clock PLLLOCK_VIRTUAL -panel_name "h: -> PLLLOCK_VIRTUAL" This analyzes all of these outputs and reports the whole analysis. It takes a bit to understand, but once you get what everything means, you can deconstruct what you want and make sure it matches how your interface works. In my opinion, this is probably the most important skill that just isn't documented well enough.