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Altera_Forum's avatar
Altera_Forum
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17 years ago

sdram tunning

hi

I use EP2C20Q240C8 with a 32 bit sdram

when I use pll number 2 (pin 177 is pll_out

that connected to sdram clock and pin 178 is

connected to sdram clock enable . Nios 2 program

is verified but the program doesn't execute .In the

other case when I use pll number 4 and sdram clock

is pin 177 and sdram clock enable is pin 178 Nios 2

program execute .Why the pll number 2 doesn't

work.I test this problem for variety of pll phase shift.

15 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    hi

    I solve this problem with change the pll in ep2c20q240c8

    this down with changing the clock input.
  • Altera_Forum's avatar
    Altera_Forum
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    Hi jamshid

    Did u change the clock input to be in the same bank as that of the PLL output?

    Thanks
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    hi

    you must change the clock in the other bank.

    --- Quote End ---

    Which PLL on the chip are u sing..if it is PLL2, did u put the clock to be pin 154 and the PLL output to be 177?

    Thanks
  • Altera_Forum's avatar
    Altera_Forum
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    hi

    I can't work with pll number 2 .

    I put the clock to pin 91 and sdram clock to pin 177.