Forum Discussion
Altera_Forum
Honored Contributor
8 years ago[SDC] Input/Output delay for All ports -> script writing
Hi All, How can I create the timing constraints (set_input/output_delay) for all ports (excepting clocks and reset ports)? Let's say the design has the following clocks: clk0, clk1, clk2 ...
Altera_Forum
Honored Contributor
8 years ago --- Quote Start --- OK, how could I list all the elements in these collections? What are the generated collections names? --- Quote End --- I have a TCL script that has these lines in it to create files with the various 'collections' contents listed:
set chan
foreach_in_collection element {
puts $chan ]
}
close $chan
set chan
foreach_in_collection element {
puts $chan ]
}
close $chan
set chan
foreach_in_collection element {
puts $chan ]
}
close $chan
set chan
foreach_in_collection element {
puts $chan ]
}
close $chan
set chan
foreach_in_collection element {
puts $chan ]
}
close $chan
set chan
foreach_in_collection element {
puts $chan ]
}
close $chan
set chan
foreach_in_collection element {
puts $chan ]
}
close $chan
set chan
foreach_in_collection element {
puts $chan ]
}
close $chan
set chan
foreach_in_collection element {
puts $chan ]
}
close $chan
set chan
foreach_in_collection element {
puts $chan ]
}
close $chan