Honored Contributor
Honored ContributorHDL's standardization is key, agreed. We are certainly not going back to build the cross industry standard for schematics. "Schematics have to be visualized" I am thinking about. I am used to visualizing hardware from block diagrams or schematics, but have a hard time getting the big picture from HDL.(Maybe lack of education).
You describe a design that has multiples of different type, and can run at moderate clock speed. Other designs may have complex functions with only moderate amounts of identical bits of hardware, other than the basic Mega Function blocks. Usually an embedded processor is used and the function programmed in a programming language which is very different from HDL, The program source code is text, the HDL is text, but what connects(interfaces) the two? Also if performance is key, the physical long path is known, what information is needed to fix it?
