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Altera_Forum
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15 years ago

Schematic entry (4th generation) vs. VHDL/Verilog (3rd generation)

Over the past 30 years I've seen languages come and go. I started programming in assembler, and have since graduated to many 2nd and 3rd generation languages. I tend to shy away from 4th generation...
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Altera_Forum
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15 years ago

I have trouble visualising over a hundred individual pin names.

You could place one pin (per io type), fill in a placeholder name that covers the longest name in your pin list and then copy/paste. You can then edit the saved .bdf as you would edit a HDL file. After that however you have to position the pins manually in the BDE.