Schematic entry (4th generation) vs. VHDL/Verilog (3rd generation)

Schematics are not a replacement for HDL, but an augmentation!

If you design the top levels in schematics you have documented the flow. 'An image is worth a thousand words'.

Of course one cannot design such a elaborate project as you describe schematically using low level components such as gates and muxes etc. That reminds us (at least me) of the days of TTL MSI components where it took months to design what we now do in days or even hours using HDL.

Using schematics may make us think more about re-usability as well as every HDL file represents a 'component'.

I agree that the use of records is a nice feature and that this is a show-stopper severely limiting the BDE. Too bad Altera hasn't developed this tool further. Adding a 'record' port facility to the BDE should be very easy as a record signal can be treated as an 'opaque' signal and can be represented by a simple wire - no range checking needed?