Schematic entry (4th generation) vs. VHDL/Verilog (3rd generation)

Well it seems that the religious war started ;)

I do agree that schematic entry is nice, and can be used for simple designs with logic gates or megafunctions but it can become complicated very fast. Of course my example was an extreme one, and could have been split in several small modules, but I'm not sure that the end result would have been easier to maintain. I find it more difficult to understand what is happening in there.

I recently designed an Ethernet router in VHDL. It is complete with a routing table, automatic update and a fast look-up function. It also has a management interface for a NIOS processor. I can't begin to imagine how I would design such a system using schematics entry. It is split in about a dozen modules, thousands of lines of code, and almost 50% of the lines are comments. I use redefined types for almost all the signals and variables, and use records to regroup together what needs to be regrouped. I hope that I made the code readable and maintainable enough that when someone else will need to look into the code and change a few things in 6 months/1 year/2 years he'll be able to do it without my help (and without me having to remember what I did ;) )

Yes HDL has its flaws. I hate some of VHDL's "features" that require me to write more lines than I think I should. But I think that the graphical tools still need to evolve a lot before they could be called one generation above HDL. And standardization between manufacturers would be necessary before it would be accepted in the industry.