Honored Contributor
Honored ContributorI have many boring reasons why that pie in the sky ain't gonna happen. Meanwhile, back in the real world: Aside from all the other engineering aspects of a design, I see the logic as control and data flow (so what?). There are not too many data flow functions, so the Wizard can pop out pretty much what is needed.
But the control logic has so many paths, it's random, has setup/hold times, fast paths, slow paths, needs optimization, Why it's Hopeless! But in the days of TTL, you could throw in a rom/eprom, whatever and every Boolean function was done in the access time of the module. Happy days are here again, there are a lot of embedded memory blocks available, so we take a fairly simple program to parse the control logic expressed in Boolean format, load up the memories and go. If the HDLers can string a bunch of if/elses together, they must be trainable to string AND/OR/NOT to express the same logic. The memories are so fast that they probably run at twice the data flow rate. All the concern about timing and routing of control logic kind of evaporates.
