Schematic entry (4th generation) vs. VHDL/Verilog (3rd generation)

Basically Daixiwen perfectly summarized by point of view, so I don't feel a need to contribute more detail arguments. I just wanted to add comments to two points I mentioned before.

- Data structures. I don't think it's a good argument for a "4th generation" language, that everything can be flattened. Yes it can. It's the same in Verilog. Fortunately System Verilog also supports structures.

- Vendor tool dependency of schematic entry. Even if you are effectively bound to a single vendor, you'll feel uncomfortable with this situation, I think. You can't navigate a hierarchical design without installing the schematic editor, you can't give it to a customer who is not sharing the tools.