Schematic entry (4th generation) vs. VHDL/Verilog (3rd generation)

I've seen more "spaghetti" designs using schematics that VHDL ;)

We have a few complex designs that were done several years ago entirely in schematics, spawning aver several A3 pages with connections everywhere, and no comments.

You can write bad code in any language, including graphics entry (the same applies for good code, obviously). The choice usually ends up with what you are most comfortable with (or better, what the whole team is comfortable with) and more efficient. I think that for designs that use more than a few gates or primitives, HDL code is faster to write, easier to document/comment/organize, and easier to maintain.