Schematic entry (4th generation) vs. VHDL/Verilog (3rd generation)

According to my experience, graphic programming tools, that look intuitive and powerful at first sight turn out to be somewhat limited and long winded when using them for complex designs. I got basically the same impression with tools in different application fields, e.g.

Agilent VI (test and measurement)

LabVIEW (test and measurement)

Matlab Simulink (system modelling and simulation)

Quartus BDE

I think, the most serious restriction is, that the schematics can be only viewn completely with the original software tool. The printouts (if you have sufficient free space around your workplace to place them) except being unwieldy are hiding important details.

Small designs can be entered quickly, with growing complexety, the effort to copy, arrange and connect blocks increases enormously. And clearness fades.

Regarding Quartus schematic entry, the missing support for structured data types is a sufficient reason not to use it for my designs.

Finally. To deserve the name "4th generation language", schematic entry would need a portable and standarized file format (may be XML) that allow full exchange between vendor tools.