Schematic entry (4th generation) vs. VHDL/Verilog (3rd generation)

BuGless:

the question you are raising would best be answered if you would design a similar system using schematics or using a HDL (like Verilog or VHDL). The time that you would spend in the design would be much longer.

Several high level constructs in a HDL are synthesized in hardware blocks for you. This would require a lot of work doing it each time in schematics. (You could make use of some predefined schematics or module generators, but these are far from being standardized over providers).

In HDLs it is easy to parameterize modules. In schematics except for simple bus structures parameterization is nearly non-existent.

Updating of a design made in schematics is much harder than in a HDL. In a HDL you only have to update a few lines of code. In schematics you have to update the placement and wiring in a drawing which can easily clutter your overview. This usually takes much more time.

HDLs are definitly much higher level and more productive than the schematics that you used 20 or 30 years ago.

HDLs like VHDL and Verilog can be used, and if carefully designed ported, over a wide range of design platforms such as Quartus, Xilinx ISE, Synopsys, Mentor Graphics, Cadence, LeonardoSpetrum etc... With schematics you are usually hooked up to one system.

A higher level of productivity in designing bus-oriented oriented architectures can be obtained by using tools such as "SOPC Builder" in Quartus. This is a graphics GUI that enables you to design bus-based systems in a very efficient way. The efficiency is obtained by the provision of a extended library of IP modules. If you adhere to the Avalon bus standards, which is not that difficult, you can also add your own modules. The SOPC system implements for you the interconnect of the busses, the placement of components in the address spaces of the busses, the bus arbitrations etc...

This tool is of course much higher level than schematics. It also provides a high productivity increase during design and is very useful.

The drawback is that it is limited to one design environment and platform.

There has been already a few decades of research effort in "further generation" languages/environments often called "high level synthesis, behavioral synthesis, system level synthesis...", some with schematics input or representation. Unfortunately, I do not know very much people or organizations that have actually used them. This is mainly because the underlying assumptions for such systems are too constraining.

I invite other people on the forum to inform about real succes-stories here, that still live on today and outside an academic research environment

For restricted application areas the above mentioned higher level design methods have found a practical way out. This is especially the case with DSP (digital signal processing). A number of succesful tools are coupled to a high level graphics interface. Systems making use of a high-level schematics for the design of DSP systems are: "DSP-Builder" of Altera and "System-Generator" of Xilinx.

so far my 5 cents...