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Altera_Forum
Honored Contributor
Honored ContributorRTL Viewer
Hi. If I have one file written in VHDL with two different architectures could I see in RTL Viewer structure for each architecture? or the architecture shown in rtlviewer wil be randomly selected b...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- The statement of "multiple architectures exist but it seems noone want to deal with it" is incorrect, in fact configurations are covered in the first section of the LRM! Similarly if you have create multiple architectures and they are always all compiled will mean that every architecture must be syntactically correct or the compilation will fail. I think this would cause more (justifiable) criticism than the way it currently works. At the end of the day the vendors tools are limited by the LRM and the functionality of their competitors' tools, irrespective of who they are. --- Quote End --- Thats not what is being asked. The OP wants to synthesise all architectures in parrallel so he can chose which one to use during the fit phase.
