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@kaz, @tricky
we can end up with "why such tool exist?" and "why vhdl allow multiple architectures?"))
multiple architectures exist but it seems noone want to deal with it. it is subject to thread in VHDL section/not here.
When you have time to research or ,for example, you have good partner. why not? Even in "advanced synthesis book" there are several approach to adders/compressors, you choose only one for one entity or choose as many as you want, then make a final decision. Will you put in one file or among many files? will it be library at all?
i got answer how i can manage with my question in current environment. it is good enough. and it seems that thread for now is mixed up with "usage rtlviewer tool" and "using vhdl architecture concept". Due to the very first question.
I appologize that you can not over-persuade me to take your position at 100%, but 70% :)
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Well I came to the conclusion that yes learners need different version of tools in order to learn best way. So yes I agree that having support for multiple architectures in one compilation will help. Altera wants profit and is not a charity. Universities need to raise issues like that and other issues like many beginners use buffer type io or bit type instead of std_logic. May be just the old things went through University programs, each professor copying his colleagues's previous slides. I am persuaded 100%
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