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Altera_Forum's avatar
Altera_Forum
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11 years ago

RTL Viewer

Hi. If I have one file written in VHDL with two different architectures could I see in RTL Viewer structure for each architecture? or the architecture shown in rtlviewer wil be randomly selected b...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

It only compiles a single architecture. There is no point compiling multiple architectures as only 1 is ever used at any one time. If you want to view each one you will need to compile the design twice.