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If I make two separte files I can achieve the desired. but I want to have only one file.

@nic_@ yes, here you can understand about you adders and comparators, and register structure too.

The early you undesrstand what you can get the early you achive the desired structure.

If you experienced user in FPGA you tend to write program as template. Yoo should do like "this" to achive "this".

Analysis and Elaboration - iterative process until you get someone that meet you. After that you can do fitting, optimisation, synthesis.

So to reduce number of Analysis and Elaboration steps just make as many architecture as you can than look at the result and choose what is suitable for you.