Rom implementation on Quartus

Hi,
if this is and the previous late thread response are ChatGPT experiments, they clearly failed.

They miss to analyse the problem of the original post. The latest code is exactly reproducing the original problem and can't infer ROM, due to cs usage, as explained above.

The verbose ChatGPT answer "Register Address for QuartusROM" quoted above is at least partly misleading and doesn't help to solve the discussed problem. The key point is to understand what is required to infer memory from HDL code. Your code can be only mapped to FPGA hardware if it corresponds to the block RAM topology, need to understand which signals are unconditionally and which optionally registered.

I appreciate that you are not directly spamming the thread with ChatGPT answers.

Regards

Frank