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Altera_Forum's avatar
Altera_Forum
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12 years ago

rom generating code problem

hiii

i've built my ROM containing data of 384000 i stated the data of 76800 and others to be "ZZ....ZZ"

when i compile the code it takes time

and finally return with this warning

(

Warning: memo_rom.vhd(76836): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association.

)

the problem is that it got an error message when i start simualtion

(

Fatal: (vsim-3734) Index value 971456 is out of range 383999 downto 0.# Time: 100 ns Iteration: 2 Process: /......./img_rom/line__76841 File: memo_rom_img.vhd# Fatal error in Architecture behavioral at memo_rom_img.vhd line 76841

)

Note

what is written on line 76841 is

data_out <= rom_data(conv_integer(addr)) when(en = '1') ;

what should i do..

Niveen..

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    That is a massive rom. Im not surprised it takes a long time...

    You cant set Rom values to be Z. It has to be '0' or '1'. 'Z' can only be covered at the tri state buffers in the pins.

    Can you post your rom code?

    And the error in simualtion is that your address value is coming as 971456 which is clearly out of range of the ROM. You need to sort your addresses out (ie. you need fewer bits in the address bus). 384000 is not a 2^n. When implemented, it will scale up to 2^19.
  • Altera_Forum's avatar
    Altera_Forum
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    what is a massive rom..

    my rom contains data of an image's pixels

    here is its code

    entity memo_rom is

    generic (pixel : integer := 9 ; img_width_cols : integer := 320; img_height_rows : integer := 240; addr_size : integer := 20);

    port(clk : in std_logic;

    en : in std_logic;

    addr : in std_logic_vector(addr_size-1 downto 0);

    data_out: out std_logic_vector(pixel-1 downto 0)

    );

    end entity;

    architecture behavioral of memo_rom is

    type ROM_Array is array ((img_width_cols*img_height_rows)-1 downto 0) of std_logic_vector (pixel-1 downto 0);

    --image size 240*320 (row*col) pixels

    constant rom_data: ROM_Array := (

    0 =>"000000000",

    1 =>"000000000",

    2 =>"000000000",

    3 =>"000000000",

    4 =>"000010111",

    5 =>"010100011",

    6 =>"010010001",

    ......

    ......

    ......

    76797 =>"000000000",

    76798 =>"000000000",

    76799 =>"000000000",

    OTHERS => "ZZZZZZZZZ"

    ) ;

    begin

    data_out <= rom_data(conv_integer(addr)) when(en = '1') else "ZZZZZZZZZ";

    end behavioral;

    i've changed the "ZZ..ZZ" to "00..00" but nothing changed

    there is nothing in my code that reaches this value 971456

    Thanks alot,

    Niveen
  • Altera_Forum's avatar
    Altera_Forum
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    Possible issue 1: you still have ZZs in the "others" case. Avoid having Z and bi-directional signals on you design, except on the I/O pins.

    Possible issue 2: That code can't be implemented in a RAM block and thus will be implemented into logic elements, which increases time and design. Try to use a design that can be implemented in a RAM block and matches Quartus ROM inference templates.

    An alternative I like for such cases is to LPM_ROM block primitive with .HEX files.

    You can also use .MIF instead of .HEX. .MIF have a simpler format, but they're not supported by ModelSIm.

    rom : lpm_rom

    generic map (

    LPM_WIDTH => 8,

    LPM_WIDTHAD => 14,

    LPM_FILE => "rom.hex",

    LPM_ADDRESS_CONTROL => "UNREGISTERED",

    LPM_OUTDATA => "REGISTERED"

    )

    port map(

    outclock => Clk,

    address => A,

    q => D

    );
  • Altera_Forum's avatar
    Altera_Forum
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    thanks alot rbugalho..

    i've already replaced ZZs by 00s but same problem..

    for using LPM_ROM..would you plz declare more

    about rom.hex file is a file that contains my memo data in hex or wt??

    execuse my lack of knowledge.. as i'm new in the field of zero experience..

    thanks,

    Niveen
  • Altera_Forum's avatar
    Altera_Forum
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    IIRC, for quartus to infer a rom, you need to use synchronous description - you cannot use asynchronous ROM. So the read address needs to be registered/

  • Altera_Forum's avatar
    Altera_Forum
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    Tricky,

    Yes, you do. I wasn't sure if the constant array + synchronous read gets inferred but I just tested on Quartus 10 and it does.

    So, simply replacing the

    data_out <= .... 

    with

    process(clk) begin
    if rising_edge(clk) then
    if en = '1' then
    	data_out <= rom_data(to_integer(unsigned(addr)));
    end if;
    end if;
    end process;

    Niveen,

    no, I was talking about an "Intel HEX" file.

    http://en.wikipedia.org/wiki/intel_hex

    Quartus has a built-in editor which lets you write such a file by hand.

    You'll also find a number of tools in the internet to write/convert data into that format.