rom generating code problem

Possible issue 1: you still have ZZs in the "others" case. Avoid having Z and bi-directional signals on you design, except on the I/O pins.

Possible issue 2: That code can't be implemented in a RAM block and thus will be implemented into logic elements, which increases time and design. Try to use a design that can be implemented in a RAM block and matches Quartus ROM inference templates.

An alternative I like for such cases is to LPM_ROM block primitive with .HEX files.

You can also use .MIF instead of .HEX. .MIF have a simpler format, but they're not supported by ModelSIm.

rom : lpm_rom

generic map (

LPM_WIDTH => 8,

LPM_WIDTHAD => 14,

LPM_FILE => "rom.hex",

LPM_ADDRESS_CONTROL => "UNREGISTERED",

LPM_OUTDATA => "REGISTERED"

)

port map(

outclock => Clk,

address => A,

q => D

);