Retaining unused logic with Quartus?

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May I ask what logic that is entirely unattached to anything else in a design is good for?

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You may safely assume that I'm up to no good. ;)

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Some days ago I tried to fill up an FPGA up to 100% LE usage by implementing weird logic connected to nothing. The only way to have the logic really be implemented was to connect it to pins.

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I've found different results depending on the vendor tools (i.e. Xilinx), but in this case virtual pins also do the trick, as pointed out by Rysc above.