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You can also try the synthesis keep and synthesis preserve directives in your HDL code. This should instruct the compiler not to remove them.
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I can push the logic through Synplify synthesis with no problem, as can be verified from the .vqm. As for constraints to protect it from there on, once it's inside Quartus, nothing that I tried seemed to work.
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Brad's suggestion in general should work. You would also need to assignments for the other compiler options that remove unused logic.
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I set up the following through the Assignment Editor, but it didn't prevent the removal:
set_instance_assignment -name PRESERVE_FANOUT_FREE_NODE ON -to "test_block:stub"
If that's not what I should have been writing, or if you can recommend something else, I'm all ears.
Honored Contributor
