Retaining unused logic with Quartus?

LCELLs are not supposed to be retained if they don't do anything useful. With your HDL file open, go to Edit -> Insert -> Template and then look at the Altera attributes. There should be a number of attributes that can help. Note that your going to have problems from both ends, i.e. logic gets removed when it doesn't drive anything, as well as when it isn't driven.

Another option would be to have inputs/outputs drive them, and then assign those inputs/outputs to be virtual pins(so they don't have to use real I/O). That may be the best solution for what your trying to do.

And why are you trying to add logic that does nothing?