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Altera_Forum's avatar
Altera_Forum
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11 years ago

Resetting an array in verilog

What's the best way to reset a 32x32 array when using the Quartus synthesis tool or any other synthesis tool for that matter. I used the following

always @ (posedge clk or posedge rst)

if (rst) begin

for (index_1 = 0; index_1 <= BUF_LENGTH ; index_1 = index_1 + 1)

buffer_1[index_1] <= 0;

end

where BUF_LENGTH = 31

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Is buffer meant to be inside a ram? Using an async reset will mean it can never be a ram, as ram cannot be reset.

    But otherwise yes, a for loop will do it.

    Btw, your array is only 1D looking at your code.
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    Is buffer meant to be inside a ram? Using an async reset will mean it can never be a ram, as ram cannot be reset.

    But otherwise yes, a for loop will do it.

    Btw, your array is only 1D looking at your code.

    --- Quote End ---

    Thanks for the response. It's not meant to be in a RAM. I need to use Thirty two 32-bit registers and rather than define each one of them an array seemed to be the best way to do it.

    I'm assigning all 32'bits to 0 on reset so

    buffer_1[index_1][31:0] <= 32'b0;

    Was the lack of the [31:0] that led you to believe its a 1D array or am I making a syntax error?
  • Altera_Forum's avatar
    Altera_Forum
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    No, I read it as 32x32 array N bit values, hence my misunderstanind.

    32'b0 shouldnt be needed, it should just work with 0.

    In my mind you should use BUF_LEGNTH = 32, as this matches the reality of the situation (more self documenting) and use BUF_LENGTH-1 as the bounds for the loop.

    Remember that loops unroll during synthesis into parrallel hardware, so just imagine your circuit of 32x32 parrallel registers.