Forum Discussion
Hello Kenny,
Thank you very much for your response. I had a look at the link that you provided. Let me try to explain the situation a bit.
I have a verified and released FPGA design in our Version Control Repository which includes all directories created under the project folder. This release was done by my previous colleague using a different PC.
Now, I took reference this release and try to reproduce the identical .rpd file.
I confirm that:
1- All design source files including Synopsys Design Constraints (.sdc) files are identical.
2- All Quartus Prime project settings are identical as I shared in my original post.
3- Both compilations were done by using Quartus Prime Version 18.1.1 Build 646 04/11/2019. So, the version of the Quartus Prime software including patches should be identical.
4- SignalTap™ II Logic Analyzer is not used.
5- Both PCs used in the compilation has Windows 11 OS and 64-bit version of Quartus.
The only thing that I cannot be sure is the portion of the design that is preserved with the Rapid recompile option or with incremental compilation partitions.
I compiled the design twice in my PC. In one of my compilation, I kept db and incremental_db directories as it is in the repository version. For the second compilation, I deleted db and incremental_db directories before starting compilation.
Under these conditions, how can I reproduce the identical .rpd file?
Thank you in advance.
Best Regards,
Alpay