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Hi Venu,
The qsys-script and qsys-generate utilities to define and generate an IP core using Tcl script
For command-line use below command.
ip-deploy --output-directory=C:\Users\anand\Desktop\test --component-name=altera_iopll --output-name=pll --family="Cyclone 10 GX" --part=10CX220YF672E6G --component-param=gui_reference_clock_frequency="100" --component-param=gui_output_clock_frequency0="500" --component-param=gui_phase_shift0="0" --component-param=gui_duty_cycle0="50"
Let me know if this has helped resolve the issue you are facing or if you need any further assistance.
Regards
Anand
Hi Anand,
Thank you for your reply, I want to know the list of auguments that can be provided with the "ip-deploy" command.
Also, i see that the argument "file-set" is not working in "ip-deploy" command. Is there any equivalent argument for "file-set" used in "ip-deploy" ?
Below is the "ip-generate" command with arguments: (The underlined argument)
C:\intelFPGA_pro\19.2\quartus\sopc_builder\bin>ip-generate --output-dir=. --file-set=QUARTUS_SYNTH --component-name=altera_fp_functions --component-param=gen_enable=true --component-param=report_resources_to_xml=1 --system-info=DEVICE_FAMILY="Arria 10" --component-param=fp_format=double --component-param=function_family=ALL --component-param=ALL_function=MUL --output-name=alterafpf_mul_double --component-param=performance_goal=frequency --component-param=frequency_target=200
Can you provide the complete list of arguments used for "ip-deploy" ?
- AnandRaj_S_Intel6 years ago
Regular Contributor
Hi Venu,
For list of arguments run ip-generate -h
- IP-deploy is used to generate the .ip file after generation of .ip file you can use quartus_ipgenerate for generating synthesis and simulation file.
Run below command and check.
ip-deploy --component-name=altera_iopll --output-name=pll --family="Cyclone 10 GX" --part=10CX220YF672E6G --component-param=gui_reference_clock_frequency="100" --component-param=gui_output_clock_frequency0="500" --component-param=gui_phase_shift0="0" --component-param=gui_duty_cycle0="50"
quartus_ipgenerate --generate_ip_file --synthesis=vhdl --simulation=verilog --clear_ip_generation_dirs --ip_file=pll.ip pll
Regards
Anand