My 2 cents:
- In practice you should not expect more than 4 cores to be efficiently utilized during placement and routing of one design. Hence, investing in more than 6 cores (to leave room for other work) is a waste of money unless you want to perform parallel compilations. In reality, you will very likely need to do parallel compilations so more cores will not hurt.
- The operating frequency of the CPU should be the first priority but if you want high core count, then you are limited to low operating frequencies.
- The cache size will likely make not much difference since memory usage is in the order of tens of GBs and the cache hitrate is likely not very good.
- Get the fastest DDR memory you can; however, if you go with a server CPU, you will be limited to slow memory modules (usually up to 2666 MHz).
- More memory channels means more memory bandwidth which can improve the speed of the "memory-intensive" process of placement and routing.
- CPU architecture will make little difference since there have hardly been any major architectural improvements in the past 5-6 years; however, going with the latest architectures is likely the best choice since you also get higher operating frequency and better memory controller.
For me, since I use OpenCL to create very large designs, the main bottleneck is the "memory size" since that is what limits the number of parallel compilations I can do per node. On a node with 256 GB of memory and 2 x 10-core modern Xeons I can only do 4 parallel compilations targetting Arria 10, or 5 targetting Stratix V. I still have unused cores in both cases but I cannot add any more parallel compilations becuase then the compilations will start crashing due to running out of memory.
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