Forum Discussion
Altera_Forum
Honored Contributor
14 years agoHe/she means that this can happen due to variances between PCBs or devices hooked up to the FPGA (doesn't matter if it is an ARM, Intel, etc... chip). Again let me remind you that if you haven't constrained your design then you can probably experience all kinds of variance between boards since you are up to the mercy of whatever silicon delays happen to be represent (let alone the difference between boards). This is why constraints exist, so that you can put a bound on timing variance to avoid these kinds of problems. ARM, Intel, etc.... constrain their designs so that you can count on parts based on their designs to work, if you don't do the same then all bets are off.....