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SteveS109's avatar
SteveS109
Icon for Occasional Contributor rankOccasional Contributor
3 months ago

Implementing MIPI DSI-2 on an Agilex 5 device

I'm using the Agilex 5 FPGA E-Series 065B Premium Development Kit. There isn't much documentation - so I decided to generate the design example and run the simulation in Questa. I generated and ran ...
Anonymous's avatar
Anonymous
2 months ago

Hi SteveS109​ ,

Glad that it work.
FYI for v25.1.1 there will be no warning for any calculation error for the Htotal and Hbend.
While in 25.3 onwards, once the value is not fit, there will be an error or warning message come out. 

To fix this, I will file and KDB and internally we are preparing a patch (to tune the default value of Example design into working value - Subject to change).

Let me know if there is anything else I can help you out, please accept my apology for the delay of support due to forum migration, thanks for reaching me back. Wish you have a great day with your cat

Regards,
Wincent_Altera

SteveS109's avatar
SteveS109
Icon for Occasional Contributor rankOccasional Contributor
2 months ago

Thank you - we look forward to receiving KDB information and patch.

In the meantime, it would help to have a blackbox IP component that could just be instantiated with Platform Designer as a placeholder.  Is that something that you can easily supply or provide guidance on how to generate?  We only need the MIPI DSI2 TX.