Forum Discussion
SparkyNZ
Contributor
ContributorError (276003): Cannot convert all sets of registers into RAM megafunctions when creating nodes.
Error (276003): Cannot convert all sets of registers into RAM megafunctions when creating nodes. The resulting number of registers remaining in design exceeds the number of registers in the device ...
Internal FPGA block RAM is synchronous, using a clock. If your code doesn't register at least frameBufferReadIndex, it can't infer RAM. Best to follow RAM code template in Quartus.
For maximum memory size, you also need to look at RAM block organization. RAM capacity of EP4CE6 is 30k x 9bit, thus you can't implement more than 30k 4-bit array elements.
FvM
Super Contributor
Super ContributorHi,
good that it works. It's impossible to understand the problem without seeing the full code.
Regarding above warning, it depends on read/write sequence if it's an actual problem. Quartus can't see it. It just tells the fact that dual clock RAM can involve inconsistent read during write behaviour. If the same address is written and read simultaneously, the read data word may be a mixture of old and new data bits.
good that it works. It's impossible to understand the problem without seeing the full code.
Regarding above warning, it depends on read/write sequence if it's an actual problem. Quartus can't see it. It just tells the fact that dual clock RAM can involve inconsistent read during write behaviour. If the same address is written and read simultaneously, the read data word may be a mixture of old and new data bits.
SparkyNZContributor
ContributorI am always happy to share full code but there's always the danger of losing IP when publicly shared. Thank you. I'll accept your answer as the solution since it has pointed me in the right direction and made me learn a bit more.
