RAM block failing timing at 320Mhz

It turns out the failing path was not internal but a loop through outside logic back to an internal register. It was hard to tell from the source and destination registers(their names are misleading). I have added constraints to the project to try to target this path and it seems to be working with over 400 MHz now, though I get other strange timing failures for other paths when I try to go higher, which I will probably ask about in another thread.