radix different nodes in Verilog with quartus

hi guys,

i am trying to write a code to implement a pwm using verilog on quartus, and wired stuff comes up.

here is the code i had,i have 2 pwm outputs. the idea is to have a counter counts up to 2^20, and a reference "ref" to be a output from the microprocessor from SOPC and then to be compared with the clock in the "pwm" module , if the counter is greater then this reference, the output will go high,else low

this is my top module

module myservo(

//inputs

CLOCK_50,

reset_n,

//outputs

GPIO_01, //pwmoutput

GPIO_02, //pwmoutput

//sram

SRAM_CE_N,

SRAM_OE_N,

SRAM_ADDR,

SRAM_UB_N,

SRAM_LB_N,

SRAM_DQ,

SRAM_WE_N

);

//input and outputs

//system

input CLOCK_50,reset_n;

//sram

output SRAM_CE_N;

output SRAM_OE_N;

output[17:0] SRAM_ADDR;

output SRAM_UB_N;

output SRAM_LB_N;

inout [15:0] SRAM_DQ;

output SRAM_WE_N;

//SRAM variables

wire SRAM_CE_N;

wire SRAM_OE_N;

wire[17:0] SRAM_ADDR;

wire SRAM_UB_N;

wire SRAM_LB_N;

wire[15:0] SRAM_DQ;

wire SRAM_WE_N;

output GPIO_01,GPIO_02;

wire[19:0] PWMSERVOL_PIO;

wire[19:0] PWMSERVOR_PIO;

// instantiate NIOS processor

myup processor_instance(

.chip_select_to_the_static_ram_0 (SRAM_CE_N),

.clk_0 (CLOCK_50),

.out_port_from_the_PWMSERVOL_PIO (PWMSERVOL_PIO),

.out_port_from_the_PWMSERVOR_PIO (PWMSERVOR_PIO),

.read_n_to_the_static_ram_0 (SRAM_OE_N),

.reset_n (reset_n),

.tri_state_bridge_0_address (SRAM_ADDR),

.tri_state_bridge_0_byteenablen ({SRAM_UB_N,SRAM_LB_N}),

.tri_state_bridge_0_data (SRAM_DQ),

.write_n_to_the_static_ram_0 (SRAM_WE_N)

);

pwm servopwm_instance(

//module pwm inputs

.clk_pwm (CLOCK_50),

.reset_pwm (reset_n),

.refL (PWMSERVOL_PIO),

.refR (PWMSERVOR_PIO),

//module pwm outputs

.pwmoutservoL (GPIO_01),

.pwmoutservoR (GPIO_02)

);

endmodule

this is my pwm module

///////////////////////////////////////////////////////////////////

module pwm(

//module pwm inputs

clk_pwm,

reset_pwm,

refL, //reference for the comparator

refR, //reference for the comparator

//module pwm outputs

pwmoutservoL,

pwmoutservoR

);

//pwmservo ports declearation

input reset_pwm;

input clk_pwm;

input [19:0] refL;

input [19:0] refR;

output reg pwmoutservoL;

output reg pwmoutservoR;

wire [19:0] count1;

always@(posedge clk_pwm)

begin

if(count1>refL)

begin

pwmoutservoL<=1;

end

else

begin

pwmoutservoL<=0;

end

end

always@(posedge clk_pwm)

begin

if (count1>refR)

begin

pwmoutservoR<=1;

end

else

begin

pwmoutservoR<=0;

end

end

count c1

(

.clk_count (clk_pwm),

.reset_count (reset_pwm),

.countout (count1)

);

endmodule

this is the count module

/////////////////////////////////////////////////////////////////////

module count(clk_count,reset_count,countout);

input clk_count,reset_count;

output reg [19:0]countout;

always@(posedge clk_count or posedge reset_count)

begin

if(reset_count)

begin

countout<=0;

end

else

begin

countout<=countout+1;

end

end

endmodule

the pwm module works fine on its own in simulation when the ref is changed to a input port of the pwm module which is the top module in the simulation.

file:///C:/Users/FRANKI%7E1/AppData/Local/Temp/moz-screenshot.jpg

but with the whole thing there is just no output at all.

i am writing to the PWMSERVOL_PIO which is the "ref" connectted with "wire" by nios .

just through

IOWR_ALTERA_AVALON_PIO_DATA(PWMSERVOL_PIO,900000)

i tried to add a ouput from the microprocessor by sopc and i can get a output from the output pin which is only one bit. the "ref" and the PIO ports are 20 bits wide and i am assuming everything include the clock is in decimal, but maybe not

i am thinking it was because all the ports didn't have the same radix, and if there is a way to modified all ports are the same radix? totally no idea.

or the way i connect the PIO ouput to the "ref" in my lower pwm module?

i am using a DE1 board by the way

well

it's quite long so thanks for reading and giving advice.