Forum Discussion
ZhaoyangDu
New Contributor
3 years agoR-tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example, VCS simulation failed.
I can't get the original R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example's VCS simulaiton passed. The error is compilation error : "[PE_CDB] corrupted data block" shown in th...
Wincent_Altera
Regular Contributor
3 years agoHi,
Please allow me to have more time to investigate on this issue.
Get back to you soon as possible.
Regards,
Wincent_Intel