Forum Discussion
ZhaoyangDu
New Contributor
3 years agoR-tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example, VCS simulation failed.
I can't get the original R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example's VCS simulaiton passed. The error is compilation error : "[PE_CDB] corrupted data block" shown in th...
Wincent_Altera
Regular Contributor
3 years agoHi,
Please accept my apology for late reply due to the Lunar New Year holiday.
Can I know your device OPN number ?
I will try to see if I am able to replicate the issue on my place.
Regards,
Wincent_Intel