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ZhaoyangDu
New Contributor
New ContributorR-tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example, VCS simulation failed.
I can't get the original R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example's VCS simulaiton passed. The error is compilation error : "[PE_CDB] corrupted data block" shown in th...
Wincent_Altera
Regular Contributor
Regular ContributorHi,
Can you run the command provided in below KDB and see if the same error still able to obtain ?
Regards,
Wincent_Intel
ZhaoyangDuNew Contributor
New ContributorHi，
I have used exactly the same command as in the link you provided and encountered the same error in this post.
Regards,
Zhaoyang Du
