Forum Discussion
Altera_Forum
Honored Contributor
11 years agoThis seems like a massively over complicated function. At then end, it appears to just return either a-b, with a load a and b appended to it when a > b or just 0 with a load of a and b appended to it. I really suggest you simulate it to see what it really does.
It also appears to be non-standard VHDL. given the use of the ext function, I guess it's using the non-standard std_logic_arith library?