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Altera_Forum
Honored Contributor
Honored ContributorQuestion about True Dual Port RAM
Hello, I'am using True dual port ram one port for write and the other one for read. When i change the content of an address i get the output on the read port delayed by two cycles. ...
Altera_ForumHonored Contributor
Honored ContributorIf you post your code and your testbench, and give more details about the problem, maybe we can help. But we can only guess at the moment.
