Forum Discussion
Altera_Forum
Honored Contributor
9 years agoQuestion about True Dual Port RAM
Hello, I'am using True dual port ram one port for write and the other one for read. When i change the content of an address i get the output on the read port delayed by two cycles. ...
Altera_Forum
Honored Contributor
9 years agoHave you got registered output? You can remove this register to reduce latency at the cost of max clock speed