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Altera_Forum
Honored Contributor
10 years agoQuestion about good design: overriding functions, function parameters or similar
Hi, Is in VHDL something similar to overriding a function or giving function as parameter to an entity (similar to c++ or javascript). I'm implementing some image processing components which...
Altera_Forum
Honored Contributor
10 years agoYou cant give a function to an entity. It just exists as a function that you can call wherever it has scope.
But from the sounds of your question you're a software programmer, and your hardware architecture sounds like a software program. This will yield terrible results in an FPGA if it even works at all. My Advise - start again, and draw your circuit (not functions) on a peice of paper outlining where all the things like memories, state machines etc are in your processing pipeline.