Question about building a prbs generator, using a lfsr, schematic entry

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Is it possible to generate a block or an IP, using VHDL code?

So i could use the generated block in the schematic.

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Yes, you can create symbols for HDL code.

I don't use schematics, so you'll have to read through the Quartus documentation to see how to generate a symbol and how to access and set the generics on a symbol.

You would be much better served using an HDL directly. You cannot simulate schematics, without first translating them to an HDL and you cannot take your schematic design and use it in another vendors tools. HDL is much more flexible.

Cheers,

Dave